The first version of the ICH was released in 1998 as a southbridge for chipsets based on the successful 82443 northbridge. While its predecessor, the 82371, was connected to the northbridge through an internal PCI bus with 133 MB/s, the ICH used a proprietary interface (called by Intel Hub Interface) that linked it to the northbridge through an 8-bit wide, 266 MB/s bus.
The Hub Interface was a point-to-point connection between different components on the motherboard. Another design decision was to substitute the rigid North-South axis on the motherboard with a star structure.
Note that, after the ICH, Intel came with other uses of the "Hub" terminology. Thus, the northbridge became the Memory Controller Hub (MCH).
The ICH has the following variations: [1]
In 2000 Intel had suffered shipwreck with the i820 northbridge. Customers were not willing to pay the high prices for RDRAM and either bought cheap i810 motherboards or changed to the competition. The hastily developed 82815 northbridge for PC-133-SDRAM became Intel's rescue anchor in the middle class segment.
The ICH1 or the new ICH2 (360 pins) could be placed to the side of the 82815. For the first time a Fast Ethernet chip (82559) was integrated into the southbridge, which needed however an external PHY chip.
The PATA interface was accelerated to ATA/100 and the number of USB connections was doubled to four. The sound chip controlled now 6-channels.
There is also a mobile variant called ICH2-M.
This has the following variations:
In 2001, Intel delivered ICH3, which was available in two versions, a server one (ICH3-S) running with the E7501 Northbridge, and a mobile version (ICH3-M), which worked with the i830 and i845 northbridges. There is no version for desktop motherboards.
In comparison with the ICH2, the changes were limited to details: The PATA Controller supported "Native Mode", it supported up to six USB-1.1 devices, SMBus 2.0, and the newest SpeedStep version which allowed power-saving devices to be switched off during operation. The chip had 421 pins.
This has the following variations:
The ICH4 was Intel's southbridge for the year 2002. The most important innovation was the support of USB 2.0 on all six ports. Sound support was improved and corresponded the newest AC97 specification, version 2.3. Like the preceding generation, the ICH4 had 421 pins.
This has the following variations:
In 2003, and in conjunction with the i865 and i875 northbridges, the ICH5 was created. A SATA host controller was integrated. The ICH5R variant additionally supported RAID 0 on SATA ports. Eight USB-2.0 ports were available. The chip had full support for ACPI 2.0. It had 460 pins.
Since 1999 the 266 MB/s hub interface was assumed to be a bottleneck. In the new chip generation, Intel therefore offered an optional ports for a Gigabit Ethernet Controller directly attached to the MCH.
The goal of this CSA technology was on to reduce the latencies for Gigabit LAN by direct memory access and to free up bandwidth on the Hub interface between ICH and MCH for non removable disk and PCI data traffic.
Since mid-2004, the large motherboard manufacturers noticed an increased complaint ratio with motherboards equipped with ICH5. A cause was the insufficient ESD firmness of certain ICH5 steppings.
In particular, when connecting USB devices over front panels, the chips died by discharges of static electricity. Intel reacted to the problem by shipping ICH5 with increased ESD tolerance. Effective ESD preventive measures on USB ports are difficult and costly, since they can impair signal quality of the USB-2.0 high-speed signals. Many motherboard manufacturers had omitted the necessary high-quality safety devices for front panel connectors for cost reasons.
This has the following variations:
ICH6 was Intel's first PCI Express southbridge. It made four PCI Express x1 ports available. Faster x16-Ports were accommodated in the MCH. The bottleneck Hub interface was replaced by a new "Direct Media Interface" (in reality a PCI Express x4 link) with 1 GB/s per direction. Support for Intel High Definition Audio was included. In addition, AC97 and the classical PCI 2.3 were still supported.
Two additional SATA ports were added, and one PATA channel was removed. The ICH6R variant supported RAID modes 0, 1, 0+1 and the Intel specific "Matrix RAID".
ICH6R and ICH6-M had AHCI SATA controllers implemented. The chips had 652 pins. Originally Intel had planned to bring two further variants under the names ICH6W and ICH6RW to the market, which should contain a software Access Point for a Wireless LAN. These chips are published.
This has the following variations:
The ICH7 started to ship in mid-2005 together with Intel's newest high-end MCH, the i955X. Two additional PCI express x1-Ports, an accelerated SATA Controller for up to 300 MB/s data transmission rate, as well as, support for Intel's "Active Management Technology" were added.
The ICH7R additionally supported RAID 5.
This has the following variations:
ICH8 is offered in several different versions and is the complement to the 965 class MCH chips. The non-mobile ICH8 does not have a traditional PATA interface, and just one AC97. In practice, most baseboard manufacturers would like to still support and offer PATA appropriate connection types over additional chips of JMicron or Marvell.
As the first, ICH controls the ICH8 eSATA and Gigabit Ethernet (before accommodated in the MCH). The base version possesses only four SATA 2.0 ports.
The ICH8R (RAID) as well as the remaining chips have the possibility of attaching six SATA devices. Additionally the ICH8DH (Digital Home) has Quick Resume and can be used together with the P965 and/or G965 in Intel Viiv-certified systems.
The counterpart to the ICH8DO (Digital Office) is the Q965 MCH, which together provide Intel vPro compatibility.
This has the following variations:
The ICH9 came in May 2007 in the chipset P35 on the market. It does not offer any PATA support. In practice, most baseboard manufacturers would like to keep providing PATA and to do so use an additional chip. Only the ICH9R, ICH9DH, ICH9DO chip have AHCI support[2]
This has the following variations:
The ICH10 is scheduled to be launched in 2008. The parallel and PS/2 ports have been removed, while an upgraded 10 Gigabit Ethernet port will be included.[3]
